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Sponsors
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Technical Sponsor
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Welcome Reception (12th Floor, VIP Room), 6-8 PM, 6/29, Sunday
Technical Session 1D
Monday, June 30
10:10 AM - 11:10 AM
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Technical Session 1D: Best Paper Nominee Presentation I
Chair: Fan Chen
MILS: Modality Interaction Driven Learning for Logic Synthesis
Mingyu Zhao, Jiawei Liu, Jianwang Zhai and Chuan Shi
Titanus: Enabling KV Cache Pruning and Quantization On-the-Fly for LLM
Acceleration
Peilin Chen and Xiaoxuan Yang
Aphelios: A Selective Lock-step Neural Processing Unit Design
Wenhao Sun, Yiming Gan, Yuhui Hao and Yinhe Han
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Technical Session 1B
Monday, June 30
10:10 AM - 11:10 AM
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Technical Session 1B: Emerging Computing & Post-CMOS Technologies I
Chair: Jeff Zhang
ADDR: Architecture Design and Model Deployment Optimization for Hybrid SRAM-ROM
Compute-in-Memory
Teng Wan, Yiming Chen, Zekai Chen, Yongpan Liu, Huazhong Yang and Xueqing Li
Fast, Transparent and Accurate Simulation of Thousand Processing-in-Memory Cores
Zhichao Lv, Tianjun Bu and Qiusong Yang
Reducing T-Depth and T-Count in Quantum Multiplication Using Compressor
Primitives
Siyi Wang, Suman Dutta, Wei Jie Bryan Lee, Jerrie Feng, Xiang Fang and Anupam
Chattopadhyay
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Technical Session 1C
Monday, June 30
10:10 AM - 11:10 AM
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Technical Session 1C: Hardware Security I
Chair: Mike Borowczak
Security Challenges Toward In-Sensor Computing Systems
Mashrafi Kajol, Nishanth Chennagouni and Qiaoyan Yu
Sliding-Window Scheduling to Exploit Hybrid-Bonding-Based Accelerators for Fully
Homomorphic
Encryption
Yi Sun, Xinhua Chen, Xinglong Yu, Wenxuan Zhang, Yifan Zhao, Honglin Kuang and
Jun Han
An Efficient Distributed Machine Learning Inference Framework with Byzantine
Fault Detection
Xuan Zhou, Utkarsh Mohan, Yao Liu and Peter Beerel
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Technical Session 1A
Monday, June 30
10:10 AM - 11:10 AM
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Technical Session 1A: VLSI Circuits and Design I
Chair: Ramtin Zand
Event-Driven Spatiotemporal Processing-In-Sensor with Phase Change Memory-based
Optical
Acceleration
Mehrdad Morsali, Deniz Najafi, Amin Shafiee, Sepehr Tabrizchi, Pietro Mercati,
Mohsen Imani,
Arman Roohi, Navid Khoshavi, Mahdi Nikdast and Shaahin Angizi
A 22nm 96.83-TOPS/W Time-Domain Compute-in-Memory Engine Utilizing
Mixed-Fidelity for Edge-AI
Applications
Jie Lou, Florian Freye, Christian Lanius and Tobias Gemmeke
IO-Optimized Design-Time Configurable Negacyclic Seven-Step NTT Architecture for
FHE
Applications
Emre Kocer, Selim Kirbiyik, Tolun Tosun, Ersin Alaybeyoglu and Erkay Savas
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Technical Session 2D
Monday, June 30
11:20 AM - 12:20 PM
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Technical Session 2D: Best Paper Nominee Presentation II
Chair: Peipei Zhou
Modeling, Design and In-situ Demonstration of Bio-inspired Central Pattern
Generator and
Neuromorphic Computing Circuits for Complex Kinematic Control of Quadruped
Robots
Qiankai Cao, Yuhao Ju, Zhiwei Zhong, Zhengyu Chen and Jie Gu
Impact of Error Rate Misreporting on Resource Allocation in Multi-tenant Quantum
Computing and
Defense
Subrata Das and Swaroop Ghosh
Microarchitecture Evaluation Framework for Transient Execution Attack
Vulnerability: Metrics,
Fuzzing, and Sensitivity Analysis
Jordan McGhee, Nayra Lujano, Aiden Peterson, Henry Duwe, Akhilesh Tyagi and Berk
Gulmezoglu
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Technical Session 2B
Monday, June 30
11:20 AM - 12:20 PM
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Technical Session 2B: Emerging Computing & Post-CMOS Technologies II
Chair: Harshvardhan Uppaluru
An Optimal DFF-Oriented Technology Legalization Algorithm for Rapid
Single-Flux-Quantum Circuits
Minglei Zhou, Rongliang Fu, Ran Zhang, Xiaochun Ye, Tsung-Yi Ho and Junying
Huang
GPU-Accelerated Simulated Oscillator Ising/Potts Machine Solving Combinatorial
Optimization
Problems
Yilmaz Ege Gonul, Ceyhun Efe Kayan, Ilknur Mustafazade, Nagarajan Kandasamy and
Baris Taskin
SOFTONIC: A Photonic Design Approach to Softmax Activation for High-Speed Fully
Analog AI
Acceleration
Priyabrata Dash, Anxiao Jiang and Dharanidhar Dang
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Technical Session 2C
Monday, June 30
11:20 AM - 12:20 PM
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Technical Session 2C: Testing, Reliability, Fault-Tolerance
Chair: Yu-Guang Chen
Optimizing Reliability and Energy Efficiency in Heterogeneous Multicore Systems:
A Novel Task
Deployment Strategy
Yu-Guang Chen, Yin-Rong Zhuo, Zheng-Wei Chen and Ing-Chao Lin
EdgeGuard: Robust and Fault-Aware Design for Resilient Edge Computing AI
Accelerators
Sabrina Ahmed, Khaza Hoque and Benjamin Carrion Schafer
EPQUIC: Efficient Post-Quantum Cryptography for QUIC-Enabled Secure
Communication
Ben Dong and Qian Wang
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Technical Session 2A
Monday, June 30
11:20 AM - 12:20 PM
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Technical Session 2A: IoT and Smart Systems
Chair: Xiaoxuan Yang
Unlocking High-Performance Low-Power Adiabatic Logic Computing with Modern
FinFET Technology
Node
Jun Yin and Mircea Stan
HyperEncoding: Spiking Neural Networks with Hyperdimensional Encoding for Robust
Edge
Intelligence
Alaaddin Goktug Ayar, Anthony Maida and Martin Margala
DPQ-HD: Post-Training Compression for Ultra-Low Power Hyperdimensional Computing
Nilesh Prasad Pandey, Shriniwas Kulkarni, David Wang, Onat Gungor, Flavio
Ponzina and Tajana
Rosing
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Technical Session 3A
Monday, June 30
3:10 PM - 4:30 PM
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Technical Session 3A: VLSI Circuits and Design II
Chair: Ishan Thakkar
A Reconfigurable and Accurate Circuit-Level Substrate for DRAM Design and
Analysis
S M Mojahidul Ahsan, Mohammad Nouri, Ramesh Reddy Ganapam, Mohammad Alian and
Tamzidul Hoque
CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs
and GPUs
Jiajun Hu, Chetan Choppali Sudarshan, Maxwell Clifford, Vidya Chhabria and Aman
Arora
A 1.27 fJ/B/transition Digital Compute-in-Memory Architecture for
Non-Deterministic Finite
Automata Evaluation
Christian Lanius, Florian Freye and Tobias Gemmeke
MAPLE: Flexible-Precision Processing-In-Memory Architecture for Efficient
On-Device ML
Jaewon Park, Quang Anh Hoang, Jonathan Ta, Shin-Haeng Kang, Kyomin Sohn and
Sang-Woo Jun
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Technical Session 3B
Monday, June 30
3:10 PM - 4:30 PM
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Technical Session 3B: Computer-Aided Design (CAD) I
Chair: Benjamin Carrion Schaefer
CADOSys: Cache Aware Design Space Optimization for Spatial ML Accelerators
Ruihao Li, Siyuan Ma, Krishna Kavi, Gayatri Mehta, Neeraja Yadwadkar and Lizy
John
A Placement Optimization Framework for Non-Integer Multiple-Height Cells
Guohao Chen, Jiaming Chang, Xingyu Tong, Peng Zou and Jianli Chen
Alchemy: A Methodology for Scalable RTL Design Space Exploration
Ryan Swann and James Stine
A Machine Learning-Assisted Placement Flow with Pin Accessibility
Awareness
Min-Feng Hsieh and Ting-Chi Wang
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Technical Session 4A
Tuesday, July 1
10:10 AM - 11:30 AM
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Technical Session 4A: Computer-Aided Design (CAD) II
Chair: Patrick H. Madden
Improving the Quality of the High-Level Synthesis Estimation Results through
Multi-Level
Predictive Models
Victoria Gammenthaler and Benjamin Carrion Schafer
Clock-Wirelength-Driven Detailed Placement
Ziang Ge, Yikai Liu, Jindong Zhou and Pingqiang Zhou
Learning Cache Coherence Traffic for NoC Routing Design
Guochu Xiong, Xiangzhong Luo and Weichen Liu
HWFixBench: Benchmarking Tools for Hardware Understanding and Fault Repair
Weimin Fu, Shijie Li, Yier Jin and Xiaolong Guo
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Technical Session 4B
Tuesday, July 1
10:10 AM - 11:30 AM
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Technical Session 4B: VLSI for Machine Learning and Artificial Intelligence I
Chair: Geng Yuan
DiffDock-FPGA: A Hardware Accelerator for Molecular Docking with Customized
Tensor Product
Framework and Sparse-Aware Access Strategy
Chuanzhao Zhang, Rui Liu, Shidi Tang, Shun Li and Ming Ling
ART: Customizing Accelerators for DNN-Enabled Real-Time Safety-Critical Systems
Shixin Ji, Xingzhen Chen, Jinming Zhuang, Wei Zhang, Zhuoping Yang, Sarah
Schultz, Yukai Song,
Jingtong Hu, Alex Jones, Zheng Dong and Peipei Zhou
VLSUMaP: A High-Performance Matrix Processor with Virtually Expanded LSU
Boosting HBM Bandwidth
Utilization
Xin Yang, Xinjie Kong, Kaixuan Wang, Xin Fan, Zikang Zhou, Zhuoyuan Yang,
Zengshi Wang and Jun
Han
HCSAs: Hybrid Computing Systolic Arrays for Accelerating Mamba Models with
Unified State Space
Buffers and Energy-Efficient Dataflow
Xu Jin, Haotian Zheng, Maohua Nie, Jialin Wang and C.-J. Richard Shi
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Technical Session 4C
Tuesday, July 1
10:10 AM - 11:30 AM
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Technical Session 4C: Hardware Security II
Chair: Jie Gu
Flip-Break: Breaking Flip-flop-based Logic Locking in Sequential Circuits
Armin Darjani, Nima Kavand and Akash Kumar
Security Aware Placement for Split Manufactured Integrated Circuit Design Flows
Arjun Suresh, Hari Narayana Burra, Wei-Huan Chen and Daniel Holcomb
Avoiding Malicious Nodes of a 3-D NoC with Security-Aware Priority-Based Routing
Alec Aversa, Hasin Ishraq Reefat, Naghmeh Karimi and Ioannis Savidis
RandEye: On-Sensor Stochastic Image Transformation for Backdoor-Resistant Edge
Inference
Wantong Li and Liuwan Zhu
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Technical Session 5A
Wednesday, July 2
10:10 AM - 11:50 AM
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Technical Session 5A: Computer-Aided Design (CAD) III
Chair: Peipei Zhou
An Effective Voltage-drop Aware Analytical Placement Approach
Jai Ming Lin, Pin Yu Chen, Min Chia Tsai, Chen Fa Tsai, De Shiun Fu and Che Li
Lin
ML4SODA: A Decision Tree Guided Design Space Exploration for Fast and High
Quality MLIR-based
HLS
Darshith Manjunath, Nicolas B. Agostini, Antonino Tumeo, Jeff J. Zhang and
Chaitali Chakrabarti
An Effective Macro Placement Framework with Reinforcement Learning and Monte
Carlo Tree Search
Jinghao Ding, Wenxin Yu, Yuanrui Qi, Zhaoqi Fu, Mengshi Gong, I-Chyn Wey and
Jinjia Zhou
Strategic Rip-Up and Reroute
Rowan Devereux-Smith and Patrick Madden
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Technical Session 5B
Wednesday, July 2
10:10 AM - 11:50 AM
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Technical Session 5B: VLSI for Machine Learning and Artificial Intelligence II
Chair: Hasita Veluri
LoRAFusion: A Crossbar-aware Multi-task Adaption Framework via Efficient Fusion
of Pretrained
LoRA Modules
Jingkai Guo, Asmer Ali, Li Yang and Deliang Fan
Digital Predistortion for Quadrature Digital Power Amplifiers Using Deep Neural
Network of
AT_LSTM: Attention LSTM
Jiayu Yang, Wending Zhao, Yicheng Li, Wang Wang, Zixu Li, Manni Li, Zijian
Huang, Yinyin Lin,
Yun Yin and Hongtao Xu
AutoRAC: Automated Processing-in-Memory Accelerator Design for Recommender
Systems
Feng Cheng, Tunhou Zhang, Junyao Zhang, Jonathan Hao-Cheng Ku, Yitu Wang,
Xiaoxuan Yang, Hai Li
and Yiran Chen
D-GCN: A Dynamic Pruning Accelerator for Deep Graph Convolutional Networks with
Hybrid Dataflow
Shun Li, Hao Zhou, Enhao Tang, Yang Liu, Shidi Tang and Ming Ling
Multi-DOF Fusion: A Flexible Fusion Strategy for Reducing Redundancy in CNN
Workloads
Yaqi Chen, Zikang Zhou, Siyao Dai, Xuyang Duan and Jun Han
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Technical Session 6A
Wednesday, July 2
1:20 PM - 2:40 PM
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Technical Session 6A: Computer-Aided Design (CAD) IV
Chair: Ashish Gautam
Oxho-3D: An Analytical Die-to-Die 3D Placement Engine
Wanling Si, Xingyu Tong, Sijie Zhou, Liang Gao, Jianli Chen and Wenchao Gao
VAER: Via-Aware Escape Routing for Chiplet Interconnection
Haochang Tian, Weiqing Ji, Mingyang Kou, Chengkai Wang, Fei Li and Hailong Yao
AuxiliarySRAM: Exploring Elastic On-Chip Memory in 2.5D Chiplet Systems Design
Zichao Ling, Lin Li, Yi Huang, Yixin Xuan, Jianwang Zhai and Kang Zhao
Enhancing Modern SAT Solver With Machine Learning Method
Guanting Chen and Jia Wang
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Technical Session 7A
Wednesday, July 2
2:50 PM - 3:50 PM
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Technical Session 7A: Emerging Computing & Post-CMOS Technologies III
Chair: Ishan Thakkar
Robust Reasoning and Learning with Brain-Inspired Representations under
Hardware-Induced
Nonlinearities
William Chung, Hamza Errahmouni Barkam, Tamoghno Das and Mohsen Imani
Revisiting Data Poisoning Attacks on Quantum Machine Learning in the NISQ Era
Satwik Kundu and Swaroop Ghosh
BrIM: A Branching In-Memory Accelerator
Stefan Maczynski, Amlan Ganguly, Mark Indovina, Purab Sutradhar, Sai Manoj
Pudukotai Dinakarrao
and Sathwika Bavikadi
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Special Session 1
Monday, June 30
3:10 PM - 4:30 PM
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Special Session 1: Sustainability Design for Cognitive Devices, Circuits, and
Systems
Chair: Jinhui Wang
Towards Memory-Efficient and Sustainable Machine Unlearning on Edge using
Zeroth-Order Optimizer
Ci Zhang, Chence Yang, Qitao Tan, Jun Liu, Ao Li, Yanzhi Wang, Jin Lu, Jinhui
Wang and Geng Yuan
An Exploration of a Heterogeneous Neural Configuration of SNNs
George Evans, Karan P. Patel, Catherine D. Schuman, Garrett S. Rose, Srutarshi
Banerjee and
Hritom Das
Low-Cost Wearable Edge-AI Device for Diabetes Management
Luke Young, Danling Wang and Na Gong
Carbon Efficiency of Natural Organic Honey-Memristor Based Neuromorphic
Computing
Harshvardhan Uppaluru, Zoe Templin, Shah Zayed Riam, Feng Zhao and Jinhui Wang
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Special Session 2
Monday, June 30
3:10 PM - 4:30 PM
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Special Session 2: Advances in Security of Quantum Computing
Chair: Jeff (Jun) Zhang
Quantum Leak: Timing Side-Channel Attacks on Cloud-Based Quantum Services
Chao Lu, Esha Telang, Aydin Aysu and Kanad Basu
Don't Cares in Quantum Circuits: A Security Perspective
Donald Lushi, Christian Rasmussen and Samah Saeed
CHEQ: Towards Enabling Circuit Integrity Checking in Quantum Controllers
Barbora Hrda, Sanjay Deshpande, Theodoros Trochatos and Jakub Szefer
Inverse-Transpilation: Reverse-Engineering Quantum Compiler Optimization Passes
from Circuit
Snapshots
Satwik Kundu and Swaroop Ghosh
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Special Session 3
Tuesday, July 1
1:10 PM - 2:50 PM
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Special Session 3: Energy-Efficient Design and Security of Large-Language Model
(LLM)
Accelerators
Chair: Sathwika Bavikadi
How Vulnerable are Large Language Models (LLMs) against Adversarial Bit-Flip
Attacks?
Abeer Matar A Almalky, Ranyang Zhou, Shaahin Angizi and Adnan Siraj Rakin
3D-PLANE: A 3D-stacked DRAM-based Programmable SLM Accelerator Capable of
Near-Memory and
Energy-Efficient Parallel Processing
Sathwika Bavikadi, Purab Ranjan Sutradhar, Jayanth Thangellamudi and Sai Manoj
Pudukotai
Dinakarrao
PREFACE - A Reinforcement Learning Framework for Code Verification via LLM
Prompt Repair
Manvi Jha, Jiaxin Wan, Huan Zhang and Deming Chen
On Jailbreaking Quantized Language Models Through Fault Injection Attacks
Noureldin Zahran, Ahmad Tahmasivand, Ihsen Alouani, Khaled Khasawneh and
Mohammed Fouda
The State of Simulation Frameworks for Evaluating Emerging LLM Accelerators
Stefan Maczynski, Amlan Ganguly and Mark Indovina
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Special Session 4 (Part I)
Tuesday, July 1
1:10 PM - 2:50 PM
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Special Session 4 (Part I): Synergistic Emerging Computing and Technologies for
Next-Generation
Intelligent Applications & Design Automation of In-Memory and In-Sensor
Computing Architectures
I
Chair: Ramtin Zand
ReX-HD: A Deterministic ReRAM-Based Hyperdimensional Computing Framework for
Edge Computing
Sabrina Hassan Moon, Ahmed Ahmed, Abu Masum, Sercan Aygun and Dayane Reis
Quantum Image Processing: A Comparative Study of NEQR and FRQI Encoding Schemes
with Hybrid
Processing
Abu Kaisar Mohammad Masum, Mehran Shoushtari Moghadam, Lida Kouhalvandi, M.
Hassan Najafi and
Sercan Aygun
A Decomposition-Based Memristive Crossbar Solver and FPGA-Accelerated Hardware
Implementation
Suyash Vardhan Singh, Anzhelika Kolinko, Ramtin Zand and Jason Bakos
SenGuard: A Novel Processing In-Sensor Method for Privacy-Enhanced Smart Imaging
Neeraj Solanki, Sepehr Tabrizchi, Ali Shafiee Sarvestani, Shaahin Angizi and
Arman Roohi
Magnetic In/Near-Sensor Architectures: From Raw Sensing to Smart Processing
Sepehr Tabrizchi, Ali Shafiee Sarvestani, Md Hasibul Amin, Deniz Najafi, Shaahin
Angizi, Ramtin
Zand and Arman Roohi
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Special Session 4 (Part II)
Wednesday, July 2
10:10 AM - 11:50 AM
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Special Session 4 (Part II): Synergistic Emerging Computing and Technologies for
Next-Generation
Intelligent Applications & Design Automation of In-Memory and In-Sensor
Computing Architectures
II
Chair: Wantong Li, Sercan Aygun
From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory
Accelerator Design
Automation
Deepak Vungarala, Md Hasibul Amin, Arman Roohi, Arnob Ghosh, Ramtin Zand and
Shaahin Angizi
Maximizing Sub-Array Resource Utilization in Digital Processing-in-Memory: A
Versatile
Hardware-Aware Approach
Gamana Aragonda, Deniz Najafi, Deepak Vungarala, Sepehr Tabrizchi, Arman Roohi
and Shaahin
Angizi
Robust Data Processing for Vector Symbolic Computing
Mehran Shoushtari Moghadam, Abu Kaisar Mohammad Masum, Sercan Aygun and M.
Hassan Najafi
Analog vs. Digital In-Sensor Computing: A Tale of Two Paradigms
Chengwei Zhou and Gourav Datta
A Hardware Prototype of an MRAM-based Stochastic Computing System
Zhengkun Yu, Tianhan Fei, Hao Cai, Heng Shi, Yumeng Yang and Siting Liu
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Special Session 5 (Part I)
Wednesday, July 2
10:10 AM - 11:50 AM
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Special Session 5 (Part I): Enhancing Edge Intelligence in Real-world Smart
Systems & From
TinyML to Transformers: AI-Driven Security for Hardware and Systems I
Chair: Shaswot Shresthamali
Transformers for Secure Hardware Systems: Applications, Challenges, and Outlook
Banafsheh Saber Latibari, Najmeh Nazari, Avesta Sasan, Houman Homayoun, Pratik
Satam, Soheil
Salehi and Hossein Sayadi
Quantum Transfer Learning to Boost Dementia Detection
Sounak Bhowmik, Talita Perciano and Himanshu Thapliyal
Energy-Efficient Quantization-Aware Training with Dynamic Bit-Width Optimization
Ali Karkehabadi and Avesta Sasan
TinyML Based Biometric Authentication Using PPG Signals for Edge Devices
Yogeswar Reddy Thota, Jeffrey Scott Nixon, Bhavya Chandran and Tooraj Nikoubin
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Special Session 6 (Part I)
Wednesday, July 2
1:20 PM - 2:40 PM
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Special Session 6 (Part I): AI-driven Edge Computing for Smart Systems &
Advancing
Neuro-Inspired Edge Intelligence
Chair: Shekhar Borah
Embedded neurally inspired visual processing
William Chapman and Frances Chance
Benchmarking Spiking Network Partitioning Methods on Loihi 2
William Severa, Felix Wang, Yang Ho, Fred Rothganger, Anurag Daram and Efrain
Gonzalez
Resistorless Grounded Memristor Emulator Using OTA-OTRA for low power edge
computing
Shekhar Suman Borah, Prabha Sundaravadivel and Krishna Reddy
TinyML Enabled Real-Time Bearing Fault Classification in Motors Using Vibration
Signals
Yogeswar Reddy Thota, Mojtaba Afshar, Samantha Boden, Brendan Dunlap, Bilal Akin
and Tooraj
Nikoubin
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Special Session 7
Wednesday, July 2
1:10 PM - 2:40 PM
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Special Session 7: Emerging Paradigms for Trustworthy and Sustainable Computing
in the Exascale
Era
Chair: Ishan Thakkar
LiteNoC: Developing Low-Cost Network-on-Chip for Deep Neural Networks
Siamak Biglari, Khoa Ho, Justin Garrigus, Hui Zhao and Saraju Mohanty
A Light-Speed Large Language Model Accelerator with Optical Stochastic
Computing
Salma Afifi, Oluwaseun Alo, Ishan Thakkar and Sudeep Pasricha
Sustainable Carbon-Aware and Water-Efficient LLM Scheduling in Geo-Distributed
Cloud
Datacenters
Hayden Moore, Sirui Qi, Ninad Hogade, Dejan Milojicic, Cullen Bash and Sudeep
Pasricha
QPUF 3.0: Sustainable Cybersecurity of Smart Grid through Security-By-Design
based on
Quantum-PUF and Quantum Key Distribution
Venkata Karthik Vishnu Vardhan Bathalapalli, Saraju Mohanty, Chenyun Pan and
Elias Kougianos
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Special Session 5 (Part II)
Wednesday, July 2
1:20 PM - 2:40 PM
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Special Session 5 (Part II): Enhancing Edge Intelligence in Real-world Smart
Systems & From
TinyML to Transformers: AI-Driven Security for Hardware and Systems II
Chair: Sercan Aygun
TinyML Based Stress Detection Utilizing PPG Signals: A Lightweight Approach for
Smart Wearable
Devices
Priyanka Ganesan, Yogeswar Reddy Thota, Hashem Shehata and Tooraj Nikoubin
Unified Gravity Loss for Robust Neural Networks Through Feature Space
Optimization
Ali Karkehabadi, Houman Homayoun and Avesta Sasan
LightBench: A Trusted Execution Platform for Intelligent Malware Detection for
Resource-Constrained Devices
Ning Miao, Hossein Sayadi, Kumara Srivatsa Kondapalli, Mahdi Eslamimehr and
Houman Homayoun
VisNAV: An Autonomous, Unified, Focus-assisted Navigation in UAVs for
Agricultural Field
Operations
Tamonash Bhattacharyya, Aryan Anand, Prabha Sundaravadivel and Henry A. Torbert
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Special Session 6 (Part II)
Wednesday, July 2
2:50 PM - 3:50 PM
|
Special Session 6 (Part II): AI-driven Edge Computing for Smart Systems &
Advancing
Neuro-Inspired Edge Intelligence
Chair: Ashish Gautam
Emotion Detection in Older Adults Using Physiological Signals from Wearable
Sensors
Md. Saif Hassan Onim, Andrew Kiselica and Himanshu Thapliyal
AI-Powered Knowledge Graphs for Neuromorphic and Energy-Efficient
Computing
Ashish Gautam, Robert Patton, Thomas Potok, Ramakrishnan Kannan, James Aimone
and William Severa
Multi-Parameter Comparative Study of Selective In-Memory Computing Processor
Architectures for
Performance Optimization in Accelerated Edge Computing
V Mohith and R Sakthivel
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Panel Session I
Monday, June 30
|
Panel Session 1: Circuit and System Research and Education in the Era of Large
Language Models
Moderator:
Fan Chen (Indiana University Bloomington)
Panelists:
Helen Li (Duke University),
Martin Margala (University of Louisiana at Lafayette),
Sudeep Pasricha (Colorado State University),
Himanshu Thapliyal (University of Tennessee, Knoxville),
Ronald DeMara (University of Central Florida)
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Panel Session II
Tuesday, July 1
|
Panel Session 2: Smarter Circuits, Smarter Memory: AI-Driven Innovation in IC
and Architecture
Moderator:
Peipei Zhou (Brown University)
Panelists:
David Pan (University of Texas at Austin),
Benjamin Carrion Schaefer (University of Texas at Dallas),
Patrick Madden (SUNY Binghamton),
Ramtin Zand (University of South Carolina)
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Industry Session
Tuesday, July 1
1:10 PM - 2:50 PM
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Industry Session
Chair: Jie Gu
Magnetic Current Sensing Solutions and Challenges for Electric Vehicles
Jerry Doorenbos (Texas Instruments)
NAND Flash Memory Scaling and Process Technology Modeling
Mark Kraman (Sandisk)
System-Level Validation Across Multiple Platforms to build a Robust 2.5D Multi
Foundry Chiplet
Solution
Tanay Karnik (Intel)
Silicon Lifecycle management: Delivering Healthcare to the Silicon Ecosystem
Pranjal Srivastava (Synopsys)
An Industrial Perspective on ML-Macro Placement Methods - Challenges and
Recommendations
Sivararamakrishnan Harihara Subramanian (Intel)
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Poster Session I
Monday, June 30
4:30 PM - 5:30 PM
|
Poster Session I
Chair: Harshvardhan Uppaluru
VLSI Circuits and Design:
Concurrency-Aware Cache Miss Cost Prediction with Perceptron Learning
Yuping Wu, Xiaoyang Lu, Xiaoming Chen, Yinhe Han and Xian-He Sun
Learning-Enabled Denial-of-Service (DoS) Attack Detection and Mitigation for
Chiplet-Based
Hybrid Interconnection Network
Md Tareq Mahmud and Ke Wang
ASF-CRB: an Energy-Efficient Activity-Balanced Charge-Recycling Bus Architecture
Based on
Alternate Signal Flipping
Xiangyu Ran, Chuxiong Lin, Jieyu Li and Weifeng He
A Lifetime Extension Framework for Communication-Intensive Systems Based on
Wavelength-Routed
Optical Networks-on-Chip
Zhidan Zheng, Liaoyuan Cheng, Jeng-De Chang, Tsun-Ming Tseng, Ing-Chao Lin and
Ulf
Schlichtmann
SFC-TRNG: A Stable Fast and Compact True Random Number Generator based on
Magnetic Tunnel
Junction
Ma Yu, Sun Yan, Zhang Jianmin and Fu Siqing
IoT and Smart Systems:
PixelPrune: Optimizing AIoT Vision Systems via In-Sensor Segmentation and
Adaptive Data
Transfer
Mohammadreza Mohammadi, Mehrdad Morsali, Sepehr Tabrizchi, Brendan Reidy, Arman
Roohi, Shaahin
Angizi and Ramtin Zand
Systolic Arrays and Structured Pruning Co-design for Efficient Transformers in
Edge Systems
Pedro Palacios Almendros, Rafael Medina Morillas, Jean-Luc Rouas, Giovanni
Ansaloni and David
Atienza
Energy-Efficient Scheduling for Cattle Collars: An Optimized Approach Based on
Analytic
Hierarchy Process and Preemption Threshold
Pengpeng Sun, Hanchen Wang, Yelan Xing, Bingze Chen, Xinrong Kou, Hongming Zhang
and Pujing
Zhang
Emerging Computing, and Post-CMOS Technologies:
CrossNAS: A Cross-Layer Neural Architecture Search Framework for PIM Systems
Md Hasibul Amin, Mohammadreza Mohammadi, Jason Bakos and Ramtin Zand
FP-SMR: A Fully Digital Floating-Point Processing-in-SAS-MRAM for Session-based
Recommender
System
Asmer Ali, Amitesh Sridharan, Cheng Guo, William Hwang, Wilman Tsai, Jeff Zhang,
Yiran Chen,
Shan X. Wang and Deliang Fan
MirrorFS: Cross-Layered File System for SSD-based In-Storage Computing
Jin Xue, Yuhong Song, Yang Guo and Zili Shao
Forensics of Transpiled Quantum Circuits
Rupshali Roy, Archisman Ghosh and Swaroop Ghosh
An Effective and Efficient Qubit Mapping Approach for Trapped-Ion Quantum
Computers
Liang-Yu Lai and Ting-Chi Wang
PruningQC: Boosting the Quantum Computation Fidelity by Pruning Redundant
Gates
Fang Qi, Yongshan Ding, Victor Bankston, Ji Liu and Lu Peng
Hardware Security:
ParallelNTT: Maximizing Performance of Forward and Inverse NTT on FPGA for
ML-DSA and ML-KEM
Bardia Taghavi, Reza Azarderakhsh and Mehran Mozaffari Kermani
Ultra-Compact and High-Throughput True Random Number Generator for FPGAs
Gabriel Cojocaru and Vincent Immler
Single-Pass Symbolic Learning for Real-Time Embedded Security
Alaaddin Goktug Ayar, Sercan Aygun and Martin Margala
SAFE-SiP: Secure Authentication Framework for System-in-Package Using
Multi-party
Computation
Ishraq Tashdid, Tasnuva Farheen and Sazadur Rahman
Late Breaking Results (LBR):
Invisible Leaks: Covert Channel Exploitation in In-Sensor Computing System
Mashrafi Kajol, Md Abdullah Al Rumon, Shehjar Sadhu, Suparna Veeturi, Dhaval
Solanki, Kunal
Mankodiya and Qiaoyan Yu
Enhancing Parallelism in Commercial PIM DRAM with LUT-Based Design
Prapti Panigrahi, Rudra Biswas, Alexandar Devic and Vijaykrishnan
Narayanan
DINGO - A Distributed & Intelligent Graph Based Memory for IoT
Sarah Glatter and Prabuddha Chakraborty
ParaHDC: Leveraging GPU Acceleration for Scalable Hyperdimensional Learning
Abu Kaisar Mohammad Masum and Sercan Aygün
LEGO: A 12nm FinFET Analog Cell Library for Analog/Mixed-Signal Applications
Xindi Liu, Chien-Jian Tseng and Richard Shi
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Poster Session II
Tuesday, July 1
4:00 PM - 5:00 PM
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Poster Session II
Chair: Sercan Aygun
Computer-Aided Design (CAD):
TACPlace: Ultrafast Thermal-Aware Chiplet Placement with Feasibility Seeking
Shan Yu, Haiyang Liu, Xinming Wei, Bizhao Shi and Guojie Luo
Breaking Behavioral IPs Design Space Lock
Baharealsadat Parchamdar and Benjamin Carrion Schafer
When Transformer Meets Layout Hotspot: An End-to-End Transformer-based Detector
with Prior
Lithography
Wenbo Xu, Silin Chen, Jiale Li, Kangjian Di, Yuxiang Fu and Ningmu Zou
Inductance-aware Clock Network Synthesis Considering Hierarchical Interconnects
in 3D ICs
Jindong Zhou, Zi'Ang Ge, Chenbo Xi and Pingqiang Zhou
Bridging the Gap between Hardware Fuzzing and Industrial Verification
Ruiyang Ma, Tianhao Wei, Jiaxi Zhang, Chun Yang, Jiangfang Yi and Guojie
Luo
Circuit Synthesis based on Hierarchical Conditional Diffusion
Xinyi Zhou, Xing Li, Yingzhao Lian, Yiwen Wang, Lei Chen, Mingxuan Yuan, Jianye
Hao, Guangyong
Chen and Pheng Ann Heng
Application Mapping Method based on Particle Swarm Optimization for
Continuous-Flow Microfluidic
Biochips
Hongjin Su, Zhisheng Chen, Bowen Liu, Zhen Chen, Genggeng Liu and Xing
Huang
Timing-Driven Application Mapping for Continuous-Flow Microfluidic Biochips
Xinyue Jiao, Youlin Pan, Bowen Liu, Zhen Chen, Genggeng Liu and Xing
Huang
IR-drop Aware Power Network Synthesis for Power Gating Designs
Jai Ming Lin and Hsin-Lin Chen
Intelligence In The Fence: Construct A Privacy and Reliable Hardware Design
Assistant LLM
Shijie Li, Weimin Fu, Yifang Zhao, Xiaolong Guo and Yier Jin
CNN Model Optimization Using a Hybrid Approach of Genetic Algorithm-based
Pruning and Retraining
with Knowledge Distillation
Kuan-Ling Chou, Cheng-Lung Wang, Yung-Chih Chen, Wuqian Tang, Yi-Ting Li,
Shih-Chieh Chang and
Chun-Yao Wang
LintLLM: An Open-Source Verilog Linting Framework Based on Large Language
Models
Zhigang Fang, Renzhi Chen, Zhijie Yang, Yang Guo, Huadong Dai and Lei
Wang
Overcoming Training Data Scarcity in Routing Demand Prediction via Ensemble
Learning
Yu-Guang Chen, Shih-Cheng Huang, Cheng-Hong Tsai, De-Shiun Fu and Mango Chia-Tso
Chao
Testing, Reliability, and Fault-Tolerance:
Accurate Fault Detection for Wavelength-Routed Optical Networks-on-Chip Under
Thermal
Variation
Yu Zhou, Zhidan Zheng, Liaoyuan Cheng, Jiahong Huang, Tsun-Ming Tseng and Ulf
Schlichtmann
Enhancing AMS Circuit Reliability: An Anomaly Dataset for Functional Safety
Research in
Automotive SoCs
Sanjay Das, Anand Menon, Omar Abiola Abioye, Afreen Fatimah Khazi-Syed, Jonathan
Edward Lee,
Ayush Arunachalam, Shamik Kundu, Pooja Madhusoodhanan, Prasanth Viswanathan
Pillai, Rubin
Parekhji, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan and Kanad
Basu
A Pixel Histogram-based Safety Mechanism and Fault Detection Methodology for a
Robust Image
Signal Processor
Julian Hoefer, Patrick Schmidt, Hella Toto-Kiesa, Sebastian Hoefer, Tanja
Harbaum, Juergen
Becker, Gregor Schewior, Dietmar Engelke, Karl-Heinz Eickel and Darius
Grantz
VLSI for Machine Learning and Artificial Intelligence:
HCTSR: A Hybrid CNN/Transformer Super-Resolution Processor with Depth-Scalable
Non-Overlapping
Window Attention
Xinhua Shi, Kaiqi Chen, Xuyang Duan and Jun Han
InFormer: A High-throughput, Ultra-efficient In-memory Compute-based
Floating-point Arithmetic
Accelerator for Transformers
Hasita Veluri and Dilip Vasudevan
EATS: Energy-Aware Adaptive Topology Switching for NoCs
Man Wu, Shaswot Shresthamali, Xiaoman Liu and Yuan He
AttenPU: An Area Efficient Attention Processor with Reconfigurable FP8 Precision
and
Dataflow
Qiawei Zheng, Pu Zhou, Zheng Wang, Zhuoyu Wu, Yike Li, Zhihao Du, Chao Chen,
Yongkui Yang, Wenqi
Fang and Anupam Chattopadhyay
On the Effectiveness of Piecewise Activation Approximations for Long-Term
Short-Memory
Networks
Srinivas Rahul Sapireddy and Mostafizur Rahman
Optimal Device Sequencing and Kernel Assignment for Multiple Heterogeneous
Machine Learning
Accelerators
Tejas Bachhav, Amol Kerkar, Rahul Rana and Patrick Madden
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