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GLSVLSI 2021

Virtual Conference and Exhibition, June 22-25, 2021

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LINKS

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GLVLSI 2021 Best Paper Award:
 
Best Paper Award:
Characterization and Mitigation of Electromigration Effects in TSV-Based Power Delivery Network Enabled 3D-Stacked DRAMs
Bobby Bose and Ishan Thakkar
 
2nd place:
MT-DLA: An Efficient Multi-Task Deep Learning Accelerator Design
Mengdi Wang, Bing Li, Ying Wang, Cheng Liu, Xiaohan Ma, Xiandong Zhao and Lei Zhang
 
3rd place:
IRONMAN: GNN-assisted Design Space Exploration in High-Level Synthesis via Reinforcement Learning
Nan Wu, Yuan Xie and Cong Hao

 

GLVLSI 2021 Service Award Recipients:
 
Dr. Tinoosh Mohsenin
Dr. Weisheng Zhao
Dr. Avesta Sasan
Dr. Ioannis Savidis
Dr. Ahmad Reza Sadeghi
Dr. Fan Chen
Dr. Binghui Wang

The 31st edition of GLSVLSI will be held as an online conference. Original, unpublished papers describing research in the general areas of VLSI and hardware design are solicited. Stay tuned for more information.

In addition to the traditional topic areas of GLSVLSI listed below, papers are solicited for a special theme of “Machine learning in CAD, EDA, and VLSI Design and Security”.


ACM Journals on Design Methods for Smart and Connected Systems

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Program Tracks

  • VLSI Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, analog/digital/mixed-signal systems, NoC, SoC, IoT, interconnects, memories, bio-inspired and neuromorphic circuits and systems, BioMEMs, lab-on-a-chip, biosensors, implantable and wearable devices.
  • VLSI Circuits and Power Aware Design: analog/digital/mixed-signal circuits, RF and communication circuits, chaos/neural/fuzzy-logic circuits, high-speed/low-power circuits, temperature estimation/optimization, power estimation/optimization, machine-learning for design and optimization of analog/digital/mixed-signal circuits, clock and power network optimization through applied machine-learning.
  • Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, CAD tools for biology and biomedical systems, algorithms and complexity analysis.
  • Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static and dynamic defect- and fault-recoverability, variation-aware design.
  • Emerging Computing & Post-CMOS Technologies: nanotechnology, molecular and quantum computing, approximate and stochastic computing, sensor and sensor networks, post CMOS VLSI.
  • Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, hardware Trojan, side-channel analysis, CPS and IoT security.
  • VLSI for Machine Learning and Artificial Intelligence: hardware accelerators for machine learning, computer architectures for machine learning, deep learning, brain-inspired computing, big data computing, cloud computing for Internet-of-Things (IoT) devices.
  • Microelectronic Systems Education: pedagogical innovations using a wide range of technologies such as ASIC, FPGA, multicore, GPU, educational techniques including novel curricula and laboratories, assessment methods, distance learning, textbooks, and design projects, Industry and academic collaborative programs and teaching.

Important Dates

Call for Papers
Paper submission deadline: January 31, 2021, 9pm EST  February 28, 2021, 9pm EST
 
Call for Special Sessions
Proposal submission deadline: February 28, 2021, 9pm EST  March 18, 2021, 9pm EST
 
Notification of acceptance/rejection: April 10, 2021
 
Camera-Ready Paper Due:
Papers: April 26, 2021
Pre-recorded videos: May 16, 2021

Author Guidelines

Paper Submission: Authors are invited to submit full-length (6 pages maximum), original, unpublished papers along with an abstract of at most 200 words. To enable blind review, the author list should be omitted from the main document. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. Electronic submission in PDF format to the http://www.glsvlsi.org website is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process.

Paper Format (camera-ready): Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at: ACM Template and the classification system detailed at: ACM 2012 Class

For LaTeX users, please use the ACM sigconf template.

Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation at the symposium. Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the symposium and present the paper.


This site is maintained by:
GLSVLSI 2021 Webmaster
Yi-Chung Chen (ychen@tnstate.edu), Tennessee State University.