GLSVLSI 2018

Chicago, Illinois, USA, May 23-25, 2018

The 28^th edition of the ACM Great Lakes Symposium on VLSI (GLSVLSI) will be held in Chicago. Original, unpublished papers describing research in the general areas of VLSI and hardware design are solicited. Stay tuned for more information.

In addition to the traditional topic areas of GLSVLSI listed below, papers are solicited for a special theme of “IoT Hardware and Heterogeneous Computing for Artificial Intelligence”.

GLVLSI 2018 Best Paper Awards:
 
1st Award: "Adapting Convolutional Neural Networks for Indoor Localization with Smart Mobile Devices," Ayush Mittal, Saideep Tiku and Sudeep Pasricha (Colorado State University)
 
2nd Award: "Low-Energy Deep Belief Networks using Intrinsic Sigmoidal Spintronic-based Probabilistic Neurons," Ramtin Zand (University of Central Florida), Kerem Y. Camsari (Purdue University), Steven D. Pyle (University of Central Florida), Ibrahim Ahmed (University of Minnesota), Chris H. Kim (University of Minnesota) and Ronald F. Demara (University of Central Florida)
 
3rd Award: "Cross-Lock: Dense Layout-Level Interconnect Locking using Cross-bar Architectures," Kaveh Shamsi (University of Florida), Meng Li (University of Texas at Austin), David Z. Pan (University of Texas at Austin) and Yier Jin (University of Florida)
 
Best Poster: "SAT-Lancer: A Hardware SAT-Solver for Self-Verification," Buse Ustaoglu, Sebastian Huhn, Daniel Große and Rolf Drechsler (University of Bremen)

Keynote Speakers

Wade Shen Program Manager DARPA	Nikil Dutt Chancellor’s Professor University of California, Irvine	Jeremy Muldavin Deputy Director of Defense Software & Microelectronics Activities Office of the Deputy Assistant Secretary of Defense	David Pellerin Head of Global Business Development Infotech/Semiconductor Amazon Web Services	X. Sharon Hu Professor University of Notre Dame

Program Tracks

• VLSI Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, analog/digital/mixed-signal systems, NoC, SoC, IoT, interconnects, memories, bio-inspired and neuromorphic circuits and systems, BioMEMs, lab-on-a-chip, biosensors, CAD tools for biology and biomedical systems, implantable and wearable devices.
• VLSI Circuits and Power Aware Design: analog/digital/mixed-signal circuits, RF and communication circuits, chaos/neural/fuzzy-logic circuits, high-speed/low-power circuits, temperature estimation/optimization, power estimation/optimization.
• Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis.
• Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static and dynamic defect- and fault-recoverability, variation-aware design.
• Emerging Computing & Post-CMOS Technologies: nanotechnology, molecular and quantum computing, approximate and stochastic computing, sensor and sensor networks, post CMOS VLSI.
• Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, hardware Trojan, side-channel analysis, CPS and IoT security.
• Machine Learning and Artificial Intelligence: hardware accelerators for machine learning, novel architectures for deep learning, brain-inspired computing, big data computing, cloud computing for Internet-of-Things (IoT) devices.

Important Dates

Author Guidelines

Paper Submission: Authors are invited to submit full-length (6 pages maximum), original, unpublished papers along with an abstract of at most 200 words. To enable blind review, the author list should be omitted from the main document. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. Electronic submission in PDF format to the http://www.glsvlsi.org website is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process.

Paper Format (camera-ready): Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at: ACM Template and the classification system detailed at: ACM 2012 Class

Please use the ACM sigconf template if you are using Latex.

The submission site is already open. The email with a submission link and the copyright forms will be sent to the corresponding author as specified during submission. Each author gets a unique link and unique DOI. Please use the link in the email for Camera-Ready submission. If you have questions regarding the corresponding author, please contact Kyle Rupnow, Proceedings Chair. Camera-Ready submission instruction is available

Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation at the symposium. Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the symposium and present the paper.

This site is maintained by:
GLSVLSI 2018 Webmaster
Yi-Chung Chen (cheny@newpaltz.edu), SUNY at New Paltz.