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“GLSVLSI 2020 is postponed to September 8-11 due to the outbreak of coronavirus in China and various travel restrictions. The conference will be held as an online conference.”
The 30th edition of the ACM Great Lakes Symposium on VLSI
(GLSVLSI) will be held in Beijing, China.
Original, unpublished papers describing research in the general
areas of VLSI and hardware design are solicited.
Stay tuned for more information.
In addition to the traditional topic areas of GLSVLSI listed below,
papers are solicited for a special theme of “In-Memory Processing for Future Electronics”.
GLVLSI 2020 Best Paper Award:
Technical Tracks:
Best Paper Award:
Towards Programmable All-Digital True Random Number Generators
Rashmi Agrawal, Lake Bu, Eliakin del Rosario and Michel Kinsy
2nd place:
An Approximate Carry Estimating Simultaneous Adder with Rectification
Rajat Bhattacharjya, Vishesh Mishra, Saurabh Singh, Kaustav Goswami and Dip Sankar Banerjee
3rd place:
LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-Chip
Febin Sunny, Asif Mirza, Ishan Thakkar, Sudeep Pasricha and Mahdi Nikdast
MSE Track:
Best Paper Award:
A Simplified ARM Processor for VLSI Education
David Harris, Noah Boorstin, Kaveh Pezeshki, Veronica Cortes and Shuojin Hang
Keynote Speakers
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Hoi-Jun Yoo
KAIST, Korea
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Fadi Kurdahi
UC Irvine, US
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Deming Chen
UIUC, US
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Nael Abu-Ghazaleh
UC Riverside, US
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Program Tracks
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VLSI Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded
processors, analog/digital/mixed-signal systems, NoC, SoC, IoT, interconnects, memories,
bio-inspired and neuromorphic circuits and systems, BioMEMs, lab-on-a-chip, biosensors,
implantable and wearable devices.
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VLSI Circuits and Power Aware Design: analog/digital/mixed-signal circuits,
RF and communication circuits, chaos/neural/fuzzy-logic circuits, high-speed/low-power
circuits, temperature estimation/optimization, power estimation/optimization.
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Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis,
logic synthesis, simulation and formal verification, layout, design for manufacturing,
CAD tools for biology and biomedical systems, algorithms and complexity analysis.
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Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing,
reliability, robustness, static and dynamic defect- and fault-recoverability,
variation-aware design.
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Emerging Computing & Post-CMOS Technologies: nanotechnology, molecular and quantum
computing, approximate and stochastic computing, sensor and sensor networks, post CMOS VLSI.
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Hardware Security: trusted IC, IP protection, hardware security primitives, reverse
engineering, hardware Trojan, side-channel analysis, CPS and IoT security.
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VLSI for Machine Learning and Artificial Intelligence: hardware accelerators for machine
learning, computer architectures for machine learning, deep learning, brain-inspired computing, big data
computing, cloud computing for Internet-of-Things (IoT) devices.
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Microelectronic Systems Education: pedagogical innovations using a wide range of technologies
such as ASIC, FPGA, multicore, GPU, educational techniques including novel curricula and laboratories,
assessment methods, distance learning, textbooks, and design projects, Industry and academic collaborative
programs and teaching.
Important Dates
Call for Papers
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Paper submission deadline:
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December 31, 2019, 9pm EST (Extended deadline)
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Acceptance Notification:
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February 18, 2020
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Call for Special Sessions
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Proposal submission deadline:
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January 15, 2020
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Notification of acceptance/rejection:
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January 31, 2020 February 10, 2020
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Paper submission for Panels, Special sessions and Keynotes:
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June 1, 2020
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Camera-Ready Paper Due:
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Papers and keynotes:
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July 1, 2020
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Panels, posters, and special sessions:
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July 15, 2020
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Author Guidelines
Paper Submission: Authors are invited to submit full-length (6 pages maximum), original, unpublished papers along
with an abstract of at most 200 words. To enable blind review, the author list should be omitted from the main document.
Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and
will not be considered. Electronic submission in PDF format to the http://www.glsvlsi.org
website is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be
entered during the submission process.
Paper Format (camera-ready): Submissions should be in camera-ready two-column format, following the ACM proceedings specifications
located at: ACM Template
and the classification system detailed at: ACM 2012 Class
For LaTeX users, please use the ACM sigconf template.
Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation at the symposium.
Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted;
at least one of the authors is also expected to attend the symposium and present the paper.
This site is maintained by:
GLSVLSI 2020 Webmaster
Yi-Chung Chen (ychen@tnstate.edu),
Tennessee State University.
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