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June 12-14, 2024, Tampa Bay Area, FL, USA

Sponsored by ACM SIGDA

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Technical Sponsor


Corporate Sponsors

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The 34th edition of GLSVLSI will be held as an in-person conference. Original, unpublished papers describing research in the general areas of VLSI and hardware design are solicited. Please visit for more information.

Keynote Speakers

Title: From Substrate Independent AI to Substrate Utilization: Hardware and Systems Approach for Next Generation AI and AGI

Title: Spintronics Beyond Memory Operations

Title: Moore’s Law, Advanced Packaging and Heterogeneous Integration: Do they hold the key for enabling Future Systems?
Dr. Eren Kurshan
Dr. Eren Kurshan
AI Researcher and Technology Executive
Head of Research and Methodology
Princeton University
Dr. Sanjukta Bhanja
Dr. Sanjukta Bhanja
Executive Associate Dean
University of South Florida
Dr. Madhavan Swaminathan
Dr. Madhavan Swaminathan
Department Head of Electrical Engineering & William E. Leonhard Endowed Chair
Director, Center for Heterogeneous Integration of Micro Electronic Systems (CHIMES)
The Pennsylvania State University, USA

Title: From Large Language Models to Pervasive General Intelligence: The Path Forward

Title: The Chiplet Revolution

Title: Quantum Topology and ISA Collaborative Optimizations for Reduced Noise NISQ Circuits
Dr. Keshab Parhi
Dr. Keshab Parhi
Dept. of Electrical & Computer Engineering
University of Minnesota, Minneapolis
Andreas Olofsson
Andreas Olofsson
Founder and CEO of Zero ASIC
Andreas Olofsson
Dr. Alex Jones
Deputy Division Director
Electrical, Communications and Cyber Systems (ECCS)
Engineering Directorate, National Science Foundation

ACM Journals on Design Methods for Smart and Connected Systems

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Program Tracks

  • VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal systems, NoC, SoC, IoT, interconnects, memories, bio-inspired and neuromorphic circuits and systems, BioMEMs, lab-on-a-chip, biosensors, CAD tools for biology and biomedical systems, implantable and wearable devices, machine-learning for design and optimization of VLSI circuits and design, analog/digital/mixed-signal circuits.
  • IoT and Smart Systems: circuits, computing, processing, and design of IoT and smart systems such as smart cities, smart healthcare, smart transportation, smart grid, cyber-physical systems, edge computing, machine learning for IoT, TinyML.
  • Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis, physical design (placement, route, CTS), static timing analysis, signal and power integrity, machine learning for CAD and EDA design.
  • Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static/dynamic defect- and fault-recoverability, variation-aware design, learning-assisted testing.
  • Emerging Computing & Post-CMOS Technologies: nanotechnology, quantum computing, approximate and stochastic computing, sensor and sensor networks, post CMOS VLSI.
  • Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, hardware Trojans, side-channel analysis, CPS/IoT security, machine learning for HW security.
  • VLSI for Machine Learning and Artificial Intelligence: hardware accelerators for machine learning, novel architectures for deep learning, brain-inspired computing, big data computing, reinforcement learning, cloud computing for Internet-of-Things (IoT) devices.
  • Microelectronic Systems Education: Pedagogical innovations using a wide range of technologies such as ASIC, FPGA, multicore, GPU, TPU, educational techniques including novel curricula and laboratories, assessment methods, distance learning, textbooks, and design projects, Industry and academic collaborative programs and teaching.

Important Dates:

Paper submission deadline: March 8, 2024 (11:59pm EST)
Acceptance Notification: April 2, 2024
Camera-Ready: April 30, 2024


Paper Submission: Authors are invited to submit full-length 6-page (with 2 extra pages for an additional fee), original, unpublished papers along with an abstract of at most 200 words. To enable blind review, the author list should be omitted from the main document. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. Electronic submission in PDF format to the website is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process.

Paper Format (camera-ready): Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at: ACM Template and the classification system detailed at: ACM 2012 Class.

For Overleaf users, please find the following template: ACM Proceedings Template - Overleaf. For LaTeX users, please find the following ZIP file: For Word users, please find the following template: interim-layout.docx.

Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation at the symposium. Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the symposium and present the paper.

By submitting your article to an ACM Publication, you are hereby acknowledging that you and your co-authors are subject to all ACM Publications Policies, including ACM's new Publications Policy on Research Involving Human Participants and Subjects. Alleged violations of this policy or any ACM Publications Policy will be investigated by ACM and may result in a full retraction of your paper, in addition to other potential penalties, as per ACM Publications Policy.

Please ensure that you and your co-authors obtain an ORCID ID, so you can complete the publishing process for your accepted paper. ACM has been involved in ORCID from the start and we have recently made a commitment to collect ORCID IDs from all of our published authors. The collection process has started and will roll out as a requirement throughout 2022. We are committed to improve author discoverability, ensure proper attribution and contribute to ongoing community efforts around name normalization; your ORCID ID will help in these efforts.

This site is maintained by:
GLSVLSI 2024 Webmaster
Anahita Asadi ( and Yaroslav Popryho (
University of Illinois Chicago