GLSVLSI 2017

Banff, Alberta, Canada, May 10-12, 2017

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The 27th edition of the ACM Great Lakes Symposium on VLSI (GLSVLSI) will be held in the beautiful Canadian Rockies. Original, unpublished papers describing research in the general areas of VLSI and hardware design are solicited. Stay tuned for more information.

In addition to the traditional topic areas of GLSVLSI listed below, papers are solicited for a special theme of Green Technologies for Computing and IoT Applications.


LATEST NEWS & UPDATES

 

  • April 20th: Author and Presenter Guidelines:

Technical Research Sessions:
Each paper has a total of 20 minutes, where 17 minutes are allocated to the presentation itself and 3 minutes are for Q & A at the end of the talk. 

Posters: 
Posters should be mounted on the boards prior to the start of the poster session. Push pins will be available. A typical poster will consist of 9 or 12 slides, mounted individually or printed on a large poster (preferred). The poster should include a title and author list.

  • April 20th: Check out the travel information on getting to the venue!

  • April 7th: Program Schedule has been updated to reflect keynotes, special sessions and poster sessions as well! Please check it out!

  • Mar 25 2017: Keynote Speeches Announced:
    May 10th, Morning Keynote, "Cognitive Data-Centric Systems", Dr. Leland Chang, IBM
    May 11th, Morning Keynote, "Internet-of-Medical-Things", Dr. Niraj K. Jha, Princeton University
    May 11th, Lunch Keynote, "FPGAs in the Datacenter - Combining the Worlds of Hardware and Software Development", Dr. Andrew Putnam, Microsoft
    May 12th, Morning Keynote, "Green Computing: New Challenges and Opportunities", Dr. Alex Jones, University of Pittsburgh
    Special Invited Talk: May 12th, "Ideation and Entrepreneurship Mindset", Dr. Alex Bruton, Professor of Entrepreneurship, University of Calgary

  • Mar 8 2017: Registration Link now available!

  • Feb 22 2017: Hotel Information has been updated! Also, for visa related questions, please see the procedure on requesting visa support letters here.

  • Feb 14, 2017: Acceptance notifications sent. The acceptance rate is 24.4% for regular papers (6 pages in the proceedings), and 12.2% for poster papers (4 pages in the proceedings). Congratulations to all authors who got their work accepted!

  • Jan 7, 2017: 197 submissions received. 

  • Dec 10, 2016: Visit the Venue to explore and experience the beautiful Banff!

Program Tracks:

Track 1: VLSI Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, analog/digital/mixed-signal systems, NoC, SoC, IoT, interconnects, memories.

Track 2: VLSI Circuits, and Power Aware Design: analog/digital/mixed-signal circuits, RF and communication circuits, chaos/neural/fuzzy-logic circuits, high-speed/low-power circuits, temperature estimation/optimization, power estimation/optimization.

Track 3: Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis.

Track 4: Testing, Reliability, and Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static and dynamic defect- and fault-recoverability, variation-aware design.

Track 5: Emerging Computing, and Post-CMOS Technologies: nanotechnology, molecular and quantum computing, approximate and stochastic computing, sensor and sensor networks, post CMOS VLSI.

Track 6: Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, hardware Trojan, side-channel analysis, CPS and IoT security.

Track 7: Biochips, and Biological Systems: bio-inspired and neuromorphic circuits and systems, BioMEMs, lab-on-a-chip, biosensors, hardware and software solutions for medical diagnostics, CAD tools for biology and biomedical systems, implantable and wearable devices, systems and synthetic biology.

 

Important Dates

Paper Submission Deadline:

December 23 (ABSTRACT), January 6 (FULL PAPER), 2016 - EXTENDED

Acceptance Notification:

February 13, 2017

Camera-Ready Paper Due:

March 13, 2017

 

Paper Submission: Authors are invited to submit full-length (6 pages maximum), original, unpublished papers along with an abstract of at most 200 words.  To enable blind review, the author list should be omitted from the main document.  Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered.  Electronic submission in PDF format to the http://www.glsvlsi.org website is required.  Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process.

Paper Format: Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at:

http://www.acm.org/sigs/pubs/proceed/template.html

and the classification system detailed at: http://www.acm.org/class/1998

Please use the ACM sigconf template if you are using Latex.

Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation at the symposium.  Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the symposium and present the paper.

Paper Format: Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at: http://www.acm.org/publications/article-templates/proceedings-template.html/ and the classification system detailed at: http://www.acm.org/class/1998/


 

This site is maintained by:
GLSVLSI 2017 Webmaster
Theo Theocharides (ttheocharides@ucy.ac.cy), University of Cyprus.