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June 5-7, 2023, Knoxville, TN, USA

Sponsored by ACM SIGDA

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Technical Sponsors

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Many Congratulations to the GLSVLSI 2023 Best Papers and Best Poster/LBR Award Winners:

Best Paper 1st Place

Bit-Stream Processing with No Bit-Stream: Efficient Software Simulation of Stochastic Vision Machines
Sercan Aygun, M. Hassan Najafi, Mohsen Imani, and Ece Olcay Gunes

Best Paper 2nd Place

IMA-GNN: In-Memory Acceleration of Centralized and Decentralized Graph Neural Networks at the Edge
Mehrdad Morsali, Mahmoud Nazzal, Abdallah Khreishah and Shaahin Angizi

Best Paper 3rd Place

SCRAMBLE-CFI: Mitigating Fault-Induced Control-Flow Attacks on OpenTitan
Pascal Nasahl and Stefan Mangard

Best Poster/LBR Award 1st Place

Noise-Resilient and Reduced Depth Approximate Adders for NISQ Quantum Computing
Bhaskar Gaur, Travis Humble and Himanshu Thapliyal

Best Poster/LBR Award 2nd Place

Statistical Weight Refresh System for CTT-Based Synaptic Arrays
Samuel Dayo, Ataollah Saeed Monir, Mousa Karimi and Boris Vaisband

The 33rd edition of GLSVLSI will be held as an in-person conference. Original, unpublished papers describing research in the general areas of VLSI and hardware design are solicited. Stay tuned for more information.

In addition to the traditional topic areas of GLSVLSI listed below, papers are also solicited for a new track on “IoT and Smart Systems”.

Important Dates

Call for Late Breaking Research (LBR) Papers

Paper submission deadline: March 17, 2023 (11:59pm EST)
Notification of acceptance/rejection: March 28, 2023
Camera-Ready paper due: April 5, 2023

Call for Papers

Paper submission deadline: February 27, 2023 (11:59 EST) (HARD DEADLINE!)
Notification of acceptance/rejection: March 21, 2023
Camera-Ready paper due: April 5, 2023

ACM Journals on Design Methods for Smart and Connected Systems

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Program Tracks

  • VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal systems, NoC, SoC, IoT, interconnects, memories, bio-inspired and neuromorphic circuits and systems, BioMEMs, lab-on-a-chip, biosensors, CAD tools for biology and biomedical systems, implantable and wearable devices, machine-learning for design and optimization of VLSI circuits and design.
  • IoT and Smart Systems: Circuits, computing, processing, and design of IoT and smart systems such as smart cities, smart healthcare, smart transportation, smart grid etc.; cyber-physical systems, edge computing, machine learning for IoT, TinyML, cloud computing for IoT devices.
  • Computer-Aided Design (CAD): Hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis, physical design (placement, route, CTS), static timing analysis, signal and power integrity, machine learning for CAD and EDA design.
  • Testing, Reliability, Fault-Tolerance: Digital/analog/mixed-signal testing, reliability, robustness, static/dynamic defect- and fault-recoverability, variation-aware design, learning-assisted testing.
  • Emerging Computing & Post-CMOS Technologies: Nanotechnology, quantum computing, approximate and stochastic computing, sensor and sensor networks, post CMOS VLSI.
  • Hardware Security: Trusted IC, IP protection, hardware security primitives, reverse engineering, hardware Trojans, side-channel analysis, CPS/IoT security, machine learning for HW security.
  • VLSI for Machine Learning and Artificial Intelligence: Hardware accelerators for machine learning, novel architectures for deep learning, brain-inspired computing, big data computing, reinforcement learning.
  • Microelectronic Systems Education: Pedagogical innovations using a wide range of technologies such as ASIC, FPGA, multicore, GPU, TPU, educational techniques including novel curricula and laboratories, assessment methods, distance learning, textbooks, design projects, and industry/academic collaborative programs and teaching.

Author Guidelines

Paper Submission: Authors are invited to submit full-length (6 pages maximum), original, unpublished papers along with an abstract of at most 200 words. To enable blind review, the author list should be omitted from the main document. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. Electronic submission in PDF format to the website is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process.

Paper Format (camera-ready): Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at: ACM Template and the classification system detailed at: ACM 2012 Class

For Overleaf users, please find the following template: ACM Proceedings Template - Overleaf. For LaTeX users, please find the following ZIP file: For Word users, please find the following template: interim-layout.docx.

Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation at the symposium. Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the symposium and present the paper.

This site is maintained by:
GLSVLSI 2023 Webmaster
Tyler Cultice (, University of Tennessee - Knoxville.